Silicon Power is a name that I wasn’t very familiar with going into this project. However, they’re a member of the SD Card Association, and they seem to have their own manufacturer ID assigned to them, so I’ve decided to lump them in with the “name brand” cards.
I purchased these after the disappointing endurance test results on the SP Elites — I wanted to see if the issue was more to do with 3D NAND in general, or if it was more to do with SP as a brand — so I picked up some (what turned out to be) SP Superior’s and SP Superior Pro’s.
Offhand, the CID information would seem to indicate that these are just a minor variant of the SP Superior — although it’s odd that the product revision went down for this version instead of up. The size is exactly the same, and while there was a performance improvement with this version, the improvement was pretty minimal. As with the SP Superior, random read speeds are this card’s strength — with all measurements coming in over the 80th percentile (as of the time of this writing) — but the other scores were nothing to write home about.
These cards carry U3, V30, and A1 performance marks. Performance was good enough to qualify for the U3 and V30 marks, but not enough to qualify for the A1 mark. I’ll throw in my standard disclaimer: my performance testing methods do not align with those prescribed by the SD standard; perhaps they would have done better had they been tested under proper conditions.
I’ll note that this is based off of two samples — there is still a third waiting in the package. Perhaps it will fare better than the first two, but somehow I doubt it’s going to make much of a difference.
On the endurance testing front:
- Sample #1’s first error was a series of bit flips, affecting 388 sectors, during round 2,789. It was chugging along quite happily until it got to round 3,883 — with only only about 0.07% of the sectors on the card having been flagged as bad — when it suddenly decided to make itself read-only. At this point, I declared the endurance test to be over.
- Sample #2 has not yet reached the 2,000 read/write cycle mark; it’s currently expected to get there sometime in November 2025.
- Sample #3 is still in the package, waiting to be tested.
July 13, 2025